The progression of technology has required smaller devices to achieve faster circuits and more power-efficient systems. However, with supply voltage and device intrinsic gain decreasing, device biasing in deep sub-micron technologies can be challenging. A low-voltage current source is analyzed in a 28 nm CMOS, 0.85 V supply, technology to take into account undesirable effects introduced by aggressively scaled technologies. The analysis includes intrinsic gain degradation as well as short-channel effects to create a more accurate design methodology. Amplifier design challenges in deep sub-micron technologies are discussed along with a DAC bias correction technique. Frequency dependence of output resistance for a simple and a
proposed current source is presented. For the proposed current source the frequency dependence of output resistance was found to be dictated by the frequency response of the amplifier. To demonstrate the relevance of current
source resistance bandwidth a common-mode logic circuit is considered, and fabrication plans are discussed along with future work.
The conception of a digital to analogy converter (DAC) was first documented in a water supply system form the Ottoman Empire [3]. Since then the DAC has moved into electronics and has been widely used in many applications ranging from motor control to communications. These circuits have a wide variety of different architectures each with their own strengths and weaknesses. The design of a 7-bit current steering DAC in .5μm was the primary focus of the work presented. In order to meet the desired specification a segmented architecture was used. With the architecture chosen the constraints for each sub-circuit were derived and the design process started. The silicon layout of the DAC was then pursued to prepare the system for fabrication.
Automotive Functional Safety Speed Sensor Self-Diagnostic and Test Circuitry
Automotive Functional Safety Self-Diagnosing and Healing Open Drain Output
Automotive Functional Safety Speed Sensor Self-Diagnostic and Test Methodology